JPH0361225B2 - - Google Patents

Info

Publication number
JPH0361225B2
JPH0361225B2 JP26024485A JP26024485A JPH0361225B2 JP H0361225 B2 JPH0361225 B2 JP H0361225B2 JP 26024485 A JP26024485 A JP 26024485A JP 26024485 A JP26024485 A JP 26024485A JP H0361225 B2 JPH0361225 B2 JP H0361225B2
Authority
JP
Japan
Prior art keywords
instruction
register
registers
input
waiting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP26024485A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62119674A (ja
Inventor
Nobuyuki Sugiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26024485A priority Critical patent/JPS62119674A/ja
Publication of JPS62119674A publication Critical patent/JPS62119674A/ja
Publication of JPH0361225B2 publication Critical patent/JPH0361225B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
JP26024485A 1985-11-20 1985-11-20 命令制御方式 Granted JPS62119674A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26024485A JPS62119674A (ja) 1985-11-20 1985-11-20 命令制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26024485A JPS62119674A (ja) 1985-11-20 1985-11-20 命令制御方式

Publications (2)

Publication Number Publication Date
JPS62119674A JPS62119674A (ja) 1987-05-30
JPH0361225B2 true JPH0361225B2 (en]) 1991-09-19

Family

ID=17345354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26024485A Granted JPS62119674A (ja) 1985-11-20 1985-11-20 命令制御方式

Country Status (1)

Country Link
JP (1) JPS62119674A (en])

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154829A (en) * 1997-10-20 2000-11-28 Matsushita Electric Industrial Co., Ltd. Cascaded arithmetic pipeline data processor

Also Published As

Publication number Publication date
JPS62119674A (ja) 1987-05-30

Similar Documents

Publication Publication Date Title
US4591979A (en) Data-flow-type digital processing apparatus
US5832248A (en) Semiconductor integrated circuit having CPU and multiplier
US4507728A (en) Data processing system for parallel processing of different instructions
US5093920A (en) Programmable processing elements interconnected by a communication network including field operation unit for performing field operations
EP0059810B1 (en) Microprogrammed digital data processing system employing multiphase subroutine control for concurrently executing tasks
JPS646488B2 (en])
JPH06236273A (ja) スーパースカラ・プロセッサ・システムにおいて複数命令を単一サイクルでディスパッチするための方法およびシステム
US4739472A (en) Information processing device capable of rapidly processing instructions of different groups
NZ201809A (en) Microprocessor
JP2008181551A (ja) ベクトルレジスタを備えたコンピュータにおけるベクトルテールゲーティング
US4197589A (en) Operation sequencing mechanism
US4338662A (en) Microinstruction processing unit responsive to interruption priority order
US5333281A (en) Advanced instruction execution system for assigning different indexes to instructions capable of parallel execution and same indexes to instructions incapable of parallel execution
US4152763A (en) Control system for central processing unit with plural execution units
US4314332A (en) Memory control system
US5079694A (en) Data processing apparatus having a working memory area
US4259718A (en) Processor for a data processing system
US5034879A (en) Programmable data path width in a programmable unit having plural levels of subinstruction sets
US5526500A (en) System for operand bypassing to allow a one and one-half cycle cache memory access time for sequential load and branch instructions
JPS59106075A (ja) デ−タ処理システム
JPH0361225B2 (en])
US5677859A (en) Central processing unit and an arithmetic operation processing unit
JP2638613B2 (ja) プログラマブル アクセラレータ及びその方法
JPS6134186B2 (en])
US4467410A (en) Multi-phase subroutine control circuitry

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees